* Copyright (C) 2000 - 2006 Intel Corporation
* Supports ACPI Specification Revision 3.0a
*
- * Compilation of "dsdt.asl" - Fri Feb 16 15:14:37 2007
+ * Compilation of "dsdt.asl" - Mon Feb 26 11:09:49 2007
*
* C source code output
*
*/
unsigned char AmlCode[] =
{
- 0x44,0x53,0x44,0x54,0x9F,0x0D,0x00,0x00, /* 00000000 "DSDT...." */
- 0x02,0xEE,0x58,0x65,0x6E,0x00,0x00,0x00, /* 00000008 "..Xen..." */
+ 0x44,0x53,0x44,0x54,0x67,0x0D,0x00,0x00, /* 00000000 "DSDTg..." */
+ 0x02,0xE0,0x58,0x65,0x6E,0x00,0x00,0x00, /* 00000008 "..Xen..." */
0x48,0x56,0x4D,0x00,0x00,0x00,0x00,0x00, /* 00000010 "HVM....." */
0x00,0x00,0x00,0x00,0x49,0x4E,0x54,0x4C, /* 00000018 "....INTL" */
0x07,0x07,0x06,0x20,0x08,0x50,0x4D,0x42, /* 00000020 "... .PMB" */
0x04,0x0A,0x07,0x0A,0x07,0x00,0x00,0x08, /* 00000060 "........" */
0x50,0x49,0x43,0x44,0x00,0x14,0x0C,0x5F, /* 00000068 "PICD..._" */
0x50,0x49,0x43,0x01,0x70,0x68,0x50,0x49, /* 00000070 "PIC.phPI" */
- 0x43,0x44,0x10,0x44,0xD2,0x5F,0x53,0x42, /* 00000078 "CD.D._SB" */
+ 0x43,0x44,0x10,0x4C,0xCE,0x5F,0x53,0x42, /* 00000078 "CD.L._SB" */
0x5F,0x5B,0x82,0x49,0x04,0x4D,0x45,0x4D, /* 00000080 "_[.I.MEM" */
0x30,0x08,0x5F,0x48,0x49,0x44,0x0C,0x41, /* 00000088 "0._HID.A" */
0xD0,0x0C,0x02,0x08,0x5F,0x43,0x52,0x53, /* 00000090 "...._CRS" */
0x00,0x00,0xFF,0xFF,0x09,0x00,0x00,0x00, /* 000000B0 "........" */
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 000000B8 "........" */
0x00,0x00,0x00,0x00,0x0A,0x00,0x00,0x00, /* 000000C0 "........" */
- 0x00,0x00,0x79,0x00,0x5B,0x82,0x41,0xCD, /* 000000C8 "..y.[.A." */
+ 0x00,0x00,0x79,0x00,0x5B,0x82,0x49,0xC9, /* 000000C8 "..y.[.I." */
0x50,0x43,0x49,0x30,0x08,0x5F,0x48,0x49, /* 000000D0 "PCI0._HI" */
0x44,0x0C,0x41,0xD0,0x0A,0x03,0x08,0x5F, /* 000000D8 "D.A...._" */
0x55,0x49,0x44,0x00,0x08,0x5F,0x41,0x44, /* 000000E0 "UID.._AD" */
0x00,0xF0,0xFF,0xFF,0xFF,0xF4,0x00,0x00, /* 00000160 "........" */
0x00,0x00,0x00,0x00,0x00,0x05,0x79,0x00, /* 00000168 "......y." */
0xA4,0x50,0x52,0x54,0x30,0x08,0x42,0x55, /* 00000170 ".PRT0.BU" */
- 0x46,0x41,0x11,0x09,0x0A,0x06,0x23,0x60, /* 00000178 "FA....#`" */
+ 0x46,0x41,0x11,0x09,0x0A,0x06,0x23,0xA0, /* 00000178 "FA....#." */
0x0C,0x18,0x79,0x00,0x08,0x42,0x55,0x46, /* 00000180 "..y..BUF" */
0x42,0x11,0x09,0x0A,0x06,0x23,0x00,0x00, /* 00000188 "B....#.." */
0x18,0x79,0x00,0x8B,0x42,0x55,0x46,0x42, /* 00000190 ".y..BUFB" */
0x0C,0x04,0x0C,0xFF,0xFF,0x0F,0x00,0x0A, /* 00000A68 "........" */
0x02,0x00,0x0A,0x2F,0x12,0x0C,0x04,0x0C, /* 00000A70 ".../...." */
0xFF,0xFF,0x0F,0x00,0x0A,0x03,0x00,0x0A, /* 00000A78 "........" */
- 0x10,0x5B,0x82,0x4C,0x31,0x49,0x53,0x41, /* 00000A80 ".[.L1ISA" */
+ 0x10,0x5B,0x82,0x44,0x2E,0x49,0x53,0x41, /* 00000A80 ".[.D.ISA" */
0x5F,0x08,0x5F,0x41,0x44,0x52,0x0C,0x00, /* 00000A88 "_._ADR.." */
0x00,0x01,0x00,0x5B,0x80,0x50,0x49,0x52, /* 00000A90 "...[.PIR" */
0x51,0x02,0x0A,0x60,0x0A,0x04,0x10,0x2E, /* 00000A98 "Q..`...." */
0x09,0x5F,0x53,0x54,0x41,0x00,0xA4,0x0A, /* 00000D48 "._STA..." */
0x0F,0x08,0x5F,0x43,0x52,0x53,0x11,0x10, /* 00000D50 ".._CRS.." */
0x0A,0x0D,0x47,0x01,0xF8,0x03,0xF8,0x03, /* 00000D58 "..G....." */
- 0x01,0x08,0x22,0x10,0x00,0x79,0x00,0x5B, /* 00000D60 ".."..y.[" */
- 0x82,0x36,0x4C,0x54,0x50,0x31,0x08,0x5F, /* 00000D68 ".6LTP1._" */
- 0x48,0x49,0x44,0x0C,0x41,0xD0,0x04,0x00, /* 00000D70 "HID.A..." */
- 0x08,0x5F,0x55,0x49,0x44,0x0A,0x02,0x14, /* 00000D78 "._UID..." */
- 0x09,0x5F,0x53,0x54,0x41,0x00,0xA4,0x0A, /* 00000D80 "._STA..." */
- 0x0F,0x08,0x5F,0x43,0x52,0x53,0x11,0x10, /* 00000D88 ".._CRS.." */
- 0x0A,0x0D,0x47,0x01,0x78,0x03,0x78,0x03, /* 00000D90 "..G.x.x." */
- 0x08,0x08,0x22,0x80,0x00,0x79,0x00,
+ 0x01,0x08,0x22,0x10,0x00,0x79,0x00,
};
int DsdtLen=sizeof(AmlCode);
db 0 ;; pci bus number
db 0x08 ;; pci device number (bit 7-3)
db 0x61 ;; link value INTA#: pointer into PCI2ISA config space
- dw 0x0c60 ;; IRQ bitmap INTA#
+ dw 0x0ca0 ;; IRQ bitmap INTA#
db 0x62 ;; link value INTB#
- dw 0x0c60 ;; IRQ bitmap INTB#
+ dw 0x0ca0 ;; IRQ bitmap INTB#
db 0x63 ;; link value INTC#
- dw 0x0c60 ;; IRQ bitmap INTC#
+ dw 0x0ca0 ;; IRQ bitmap INTC#
db 0x60 ;; link value INTD#
- dw 0x0c60 ;; IRQ bitmap INTD#
+ dw 0x0ca0 ;; IRQ bitmap INTD#
db 0 ;; physical slot (0 = embedded)
db 0 ;; reserved
;; second slot entry: 1st PCI slot
db 0 ;; pci bus number
db 0x10 ;; pci device number (bit 7-3)
db 0x62 ;; link value INTA#
- dw 0x0c60 ;; IRQ bitmap INTA#
+ dw 0x0ca0 ;; IRQ bitmap INTA#
db 0x63 ;; link value INTB#
- dw 0x0c60 ;; IRQ bitmap INTB#
+ dw 0x0ca0 ;; IRQ bitmap INTB#
db 0x60 ;; link value INTC#
- dw 0x0c60 ;; IRQ bitmap INTC#
+ dw 0x0ca0 ;; IRQ bitmap INTC#
db 0x61 ;; link value INTD#
- dw 0x0c60 ;; IRQ bitmap INTD#
+ dw 0x0ca0 ;; IRQ bitmap INTD#
db 1 ;; physical slot (0 = embedded)
db 0 ;; reserved
;; third slot entry: 2nd PCI slot
db 0 ;; pci bus number
db 0x18 ;; pci device number (bit 7-3)
db 0x63 ;; link value INTA#
- dw 0x0c60 ;; IRQ bitmap INTA#
+ dw 0x0ca0 ;; IRQ bitmap INTA#
db 0x60 ;; link value INTB#
- dw 0x0c60 ;; IRQ bitmap INTB#
+ dw 0x0ca0 ;; IRQ bitmap INTB#
db 0x61 ;; link value INTC#
- dw 0x0c60 ;; IRQ bitmap INTC#
+ dw 0x0ca0 ;; IRQ bitmap INTC#
db 0x62 ;; link value INTD#
- dw 0x0c60 ;; IRQ bitmap INTD#
+ dw 0x0ca0 ;; IRQ bitmap INTD#
db 2 ;; physical slot (0 = embedded)
db 0 ;; reserved
;; 4th slot entry: 3rd PCI slot
db 0 ;; pci bus number
db 0x20 ;; pci device number (bit 7-3)
db 0x60 ;; link value INTA#
- dw 0x0c60 ;; IRQ bitmap INTA#
+ dw 0x0ca0 ;; IRQ bitmap INTA#
db 0x61 ;; link value INTB#
- dw 0x0c60 ;; IRQ bitmap INTB#
+ dw 0x0ca0 ;; IRQ bitmap INTB#
db 0x62 ;; link value INTC#
- dw 0x0c60 ;; IRQ bitmap INTC#
+ dw 0x0ca0 ;; IRQ bitmap INTC#
db 0x63 ;; link value INTD#
- dw 0x0c60 ;; IRQ bitmap INTD#
+ dw 0x0ca0 ;; IRQ bitmap INTD#
db 3 ;; physical slot (0 = embedded)
db 0 ;; reserved
;; 5th slot entry: 4rd PCI slot
db 0 ;; pci bus number
db 0x28 ;; pci device number (bit 7-3)
db 0x61 ;; link value INTA#
- dw 0x0c60 ;; IRQ bitmap INTA#
+ dw 0x0ca0 ;; IRQ bitmap INTA#
db 0x62 ;; link value INTB#
- dw 0x0c60 ;; IRQ bitmap INTB#
+ dw 0x0ca0 ;; IRQ bitmap INTB#
db 0x63 ;; link value INTC#
- dw 0x0c60 ;; IRQ bitmap INTC#
+ dw 0x0ca0 ;; IRQ bitmap INTC#
db 0x60 ;; link value INTD#
- dw 0x0c60 ;; IRQ bitmap INTD#
+ dw 0x0ca0 ;; IRQ bitmap INTD#
db 4 ;; physical slot (0 = embedded)
db 0 ;; reserved
;; 6th slot entry: 5rd PCI slot
db 0 ;; pci bus number
db 0x30 ;; pci device number (bit 7-3)
db 0x62 ;; link value INTA#
- dw 0x0c60 ;; IRQ bitmap INTA#
+ dw 0x0ca0 ;; IRQ bitmap INTA#
db 0x63 ;; link value INTB#
- dw 0x0c60 ;; IRQ bitmap INTB#
+ dw 0x0ca0 ;; IRQ bitmap INTB#
db 0x60 ;; link value INTC#
- dw 0x0c60 ;; IRQ bitmap INTC#
+ dw 0x0ca0 ;; IRQ bitmap INTC#
db 0x61 ;; link value INTD#
- dw 0x0c60 ;; IRQ bitmap INTD#
+ dw 0x0ca0 ;; IRQ bitmap INTD#
db 5 ;; physical slot (0 = embedded)
db 0 ;; reserved
-
-pci_irq_list:
- db 11, 10, 9, 5;
-
-pcibios_init_sel_reg:
- push eax
- mov eax, #0x800000
- mov ax, bx
- shl eax, #8
- and dl, #0xfc
- or al, dl
- mov dx, #0x0cf8
- out dx, eax
- pop eax
- ret
-
-pcibios_init_set_elcr:
- push ax
- push cx
- mov dx, #0x04d0
- test al, #0x08
- jz is_master_pic
- inc dx
- and al, #0x07
-is_master_pic:
- mov cl, al
- mov bl, #0x01
- shl bl, cl
- in al, dx
- or al, bl
- out dx, al
- pop cx
- pop ax
- ret
-
-pcibios_init:
- push ds
- push bp
- mov ax, #0xf000
- mov ds, ax
- mov dx, #0x04d0 ;; reset ELCR1 + ELCR2
- mov al, #0x00
- out dx, al
- inc dx
- out dx, al
- mov si, #pci_routing_table_structure
- mov bh, [si+8]
- mov bl, [si+9]
- mov dl, #0x00
- call pcibios_init_sel_reg
- mov dx, #0x0cfc
- in eax, dx
- cmp eax, [si+12] ;; check irq router
- jne pci_init_end
- mov dl, [si+34]
- call pcibios_init_sel_reg
- push bx ;; save irq router bus + devfunc
- mov dx, #0x0cfc
- mov ax, #0x8080
- out dx, ax ;; reset PIRQ route control
- inc dx
- inc dx
- out dx, ax
- mov ax, [si+6]
- sub ax, #0x20
- shr ax, #4
- mov cx, ax
- add si, #0x20 ;; set pointer to 1st entry
- mov bp, sp
- mov ax, #pci_irq_list
- push ax
- xor ax, ax
- push ax
-pci_init_loop1:
- mov bh, [si]
- mov bl, [si+1]
-pci_init_loop2:
- mov dl, #0x00
- call pcibios_init_sel_reg
- mov dx, #0x0cfc
- in ax, dx
- cmp ax, #0xffff
- jnz pci_test_int_pin
- test bl, #0x07
- jz next_pir_entry
- jmp next_pci_func
-pci_test_int_pin:
- mov dl, #0x3c
- call pcibios_init_sel_reg
- mov dx, #0x0cfd
- in al, dx
- and al, #0x07
- jz next_pci_func
- dec al ;; determine pirq reg
- mov dl, #0x03
- mul al, dl
- add al, #0x02
- xor ah, ah
- mov bx, ax
- mov al, [si+bx]
- mov dl, al
- mov bx, [bp]
- call pcibios_init_sel_reg
- mov dx, #0x0cfc
- and al, #0x03
- add dl, al
- in al, dx
- cmp al, #0x80
- jb pirq_found
- mov bx, [bp-2] ;; pci irq list pointer
- mov al, [bx]
- out dx, al
- inc bx
- mov [bp-2], bx
- call pcibios_init_set_elcr
-pirq_found:
- mov bh, [si]
- mov bl, [si+1]
- add bl, [bp-3] ;; pci function number
- mov dl, #0x3c
- call pcibios_init_sel_reg
- mov dx, #0x0cfc
- out dx, al
-next_pci_func:
- inc byte ptr[bp-3]
- inc bl
- test bl, #0x07
- jnz pci_init_loop2
-next_pir_entry:
- add si, #0x10
- mov byte ptr[bp-3], #0x00
- loop pci_init_loop1
- mov sp, bp
- pop bx
-pci_init_end:
- pop bp
- pop ds
- ret
#endif // BX_PCIBIOS
; parallel port detection: base address in DX, index in BX, timeout in CL